HACKER Q&A
📣 downvotetruth

Has a 4 core CPU with a "T" core layout been made?


If not, why not? It seems optimal when attempting to layout in 2D a 4 core CPU cluster with each of the cores directly connected to one another - above the top of the "T" would have a link to connect the end cores & cache fill in above & on the sides making a rectangle to cut. Compare Zen 1 & 2 with the cache in the center splitting the cores: https://i.ytimg.com/vi/NXprMIzv_uw/maxresdefault.jpg The same symmetric splitting with the i7-5960x & Zen 3 & 4 "octo-ring": https://cdn.wccftech.com/wp-content/uploads/2020/11/AMD-Ryzen-5000-Zen-3-Desktop-CPU_Vermeer_Die-Shot_1-scaled.jpg with the ring bringing the need for NUMA. The quad core I7-975 was linear https://www.guru3d.com/miraserver/images/2008/corei7/Nehalem_Die_callout.jpg Quad square configurations appear to have been used for Xeons: https://qph.cf2.quoracdn.net/main-qimg-6762cf8e384ca54f7d7640cadddd511f-pjlq & Athlons: https://static.techspot.com/articles-info/197/images/Image_02-j.webp, but not a "T". If latency being equal between the cores is the reason, then take out middle core & have equidistant tri-cores seesaw that could be linearly chained with the half core excess filled with cache on the ends, but again this does not appear to exist?


  👤 wmf Accepted Answer ✓
The cores don't connect to each other; they connect to the shared cache. Existing layouts are probably near-optimal.

👤 db48x
Dumb question. Remember that whatever shape you create has to be one that you can cut out of a wafer. The wafer is a foot across and has many, many tiny copies of your chip etched into the surface. You then use a saw to slice it up into individual devices. Concave shapes are therefore contraindicated.